Vision processing on FPGA (part 1)

A while ago i started working with openCV to design a simple ball tracking robot. The robot was based on a beagleboard (www.beagleboard.org) and a PS3 eye camera. The openCV code was simple but was the tracking performance was poor and the speed was disapointing (~10FPS on QVGA frames).
Later i started working with FPGA and i thought i would try to do the same task at higher frame rate thanks to the available processing power. Unfortunately FPGA board are expensive and at the time i could not find cheap camera module. Then i bought a papilio (www.gadgetfactory.net)  board and found on ebay cheap camera modules (ov7670 based ~10$).  The main hurdle was that there is no such thing as openCV for FPGAs ...

At the same time i started working with systemc and i liked how easy it was to code and simulate using this tool. I googled a bit to find an open source VHDL to SystemC translator but couldn't find any. In my previsou position i had the oportunity to work with grammar using a tool called AntLR and i heard about a nifty template engine StringTemplate that would help designing language to language transformations. Most differences between SystemC (synthesizable) and VHDL are purely syntactical so i used ANTLR + Java and wrote a converter (took 3 week). The converter works nice but does not cover all cases. I needed a test case so i wrote systemc for a full basic vision system (camera model, camera interface, down-scaling) and tested it using systemc, then i applied the converter and after some minor corrections (systemC takes care of signal initialisation while you need to use reset to initialize signals in VHDL) i had a system simulating in Xilinx ISim.

To test the code on harware i quickly soldered a camera adapter for the papilio and i was ready to test.

The main drawback of the papilio is the slow communication with a host PC (FT2232 based 3Mbit/s max) so i used a downscaler to send the image over serial port and a Java app to display it.
At first nothing worked but using an OpenBench Logic Sniffer(http://www.gadgetfactory.net/logic-sniffer-2/) i was able to debug the I2C communication (error in my I2c master module) and finaaly got an image to display !

The next step is now to process the image ...

(all this project code is available on http://code.google.com/p/fpga-cam/)